Field of the Invention
The invention relates to a semiconductor device and a method of fabricating the same.
Description of Related Art
As the integration of semiconductor devices increases, the device size continues to decrease. Since the size of each component in the device becomes smaller, the distance between the components is shortened as well. Generally, the devices are isolated from each other by an isolation structure. Nowadays, the more commonly used isolation structure is a shallow trench isolation (STI) structure. In a memory device, a suitable STI structure can increase the gate coupling ratio (GCR), reduce interference between adjacent memory devices, and at the same time maintain favorable reliability of the memory device.
The dense region and the peripheral region of the device have different environments. Therefore, when the aforementioned STI structure is fabricated, the patterning processes are usually performed separately such that the trenches formed in the dense region and the peripheral region for fabricating the isolation structure have similar contours. However, the problem of inaccurate alignment may occur during the separate patterning processes. Once inaccurate alignment occurs, the desired pattern cannot be formed. Thus, how to form trenches having similar contours in the dense region and the peripheral region of the device with fewer patterning processes is an issue that needs to be addressed.